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lt1054/lt1054l 1 1954lfg block diagram features description switched-capacitor voltage converter with regulator the lt ? 1054 is a monolithic, bipolar, switched-capacitor voltage converter and regulator. the lt1054 provides higher output current than previously available converters with significantly lower voltage losses. an adaptive switch driver scheme optimizes efficiency over a wide range of output currents. total voltage loss at 100ma output current is typically 1.1v. this holds true over the full supply voltage range of 3.5v to 15v. quiescent current is typically 2.5ma. the lt1054 also provides regulation, a feature not previ - ously available in switched-capacitor voltage converters. by adding an external resistive divider a regulated output can be obtained. this output will be regulated against changes in both input voltage and output current. the lt1054 can also be shut down by grounding the feedback pin. supply current in shutdown is less than 100a. the internal oscillator of the lt1054 runs at a nominal frequency of 25khz. the oscillator pin can be used to ad - just the switching frequency or to externally synchronize the lt1054. the lt1054 is pin compatible with previous converters such the ltc1044/icl7660. lt1054/lt1054 voltage loss applications output current: 100ma (lt1054) 125ma (lt1054l) reference and error amplifer for regulation low loss: 1.1v at 100ma operating range: 3.5v to 15v (lt1054) 3.5v to 7v (lt1054l) external shutdown external oscillator synchronization can be paralleled pin compatible with the ltc ? 1044/icl7660 available in sw16 and so-8 packages voltage inverter voltage regulator negative voltage doubler positive voltage doubler l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. reference osc drive drive drive drive osc cap ? gnd cap + feedback/ shutdown ? + r r *external capacitors 2.5v 6 1 4 3 ?v out lt1054 ? bd 5 2 8 7 q q v ref c in * v in c out * + + output current (ma) 0 voltage loss (v) 1 2 50 1054 ta01? 0 25 75 100 125 t j = 125c t j = 25c t j = ?55c lt1054 lt1054l 3.5v v in 15v (lt1054) 3.5v v in 7v (lt1054l) c in = c out = 100f indicates guaranteed test point
lt1054/lt1054l 2 1054lfg absolute maximum ratings supply voltage (note 2) lt1054 ................................................................. 16v lt1054l ................................................................. 7v input voltage pin 1 ................................................. 0v v pin1 v + pin 3 (s package) ............................. 0v v pin3 v + pin 7 .............................................. 0v v pin7 v ref pin 13 (s package) ...................... 0v v pin13 v ref operating junction temperature range lt1054c/lt1054lc .............................. 0c to 100c lt1054i ............................................. C 40c to 100c lt1054m ............................................ C55c to 125c (note 1) 1 2 3 4 8 7 6 5 top view fb/shdn cap + gnd cap ? v + osc v ref v out n8 package 8-lead plastic dip j8 package 8-lead ceramic dip t jmax = 125c, ja = 130c/w 1 2 3 4 8 7 6 5 top view v + osc v ref v out fb/shdn cap + gnd cap ? s8 package 8-lead plastic so t jmax = 125c, ja = 120c/w see regulation and capacitor selection sections in the applications information for important information on the s8 device 1 2 3 4 5 6 7 8 top view sw package 16-lead plastic so 16 15 14 13 12 11 10 9 nc nc fb/shdn cap + gnd cap ? nc nc nc nc v + osc v ref v out nc nc t jmax = 125c, ja = 150c/w pin configuration order information lead free finish tape and reel part marking package description temperature range lt1054cn8#pbf lt1054cn8#trpbf lt1054cn8 8-lead plastic dip 0c to 100c lt1054in8#pbf lt1054in8#trpbf lt1054in8 8-lead plastic dip C40c to 100c lt1054mj8#pbf lt1054mj8#trpbf lt1054mj8 8-lead ceramic dip C55c to 125c lt1054cs8#pbf lt1054cs8#trpbf 1054 8-lead plastic so 0c to 100c lt1054lcs8#pbf lt1054lcs8#trpbf 1054l 8-lead plastic so 0c to 100c lt1054is8#pbf lt1054is8#trpbf 1054i 8-lead plastic so C40c to 100c lt1054csw#pbf lt1054csw#trpbf lt1054csw 16-lead plastic so 0c to 100c lt1054isw#pbf lt1054isw#trpbf lt1054isw 16-lead plastic so C40c to 100c lt1054cj8#pbf obsolete part lt1054cj8#trpbf lt1054cj8 8-lead ceramic dip 0c to 100c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ maximum junction temperature (note 3) lt1054c/lt1054lc ......................................... 125c lt1054i ............................................................. 125c lt1054m ........................................................... 150c storage temperature range j8, n8 and s8 packages .................... C55c to 150c s package ......................................... C 65c to 150c lead temperature (soldering, 10 sec) .................. 300c
lt1054/lt1054l 3 1954lfg electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the absolute maximum supply voltage rating of 16v is for unregulated circuits using lt1054. for regulation mode circuits using lt1054 with v out 15v at pin 5 (pin 11 on s package), this rating may be increased to 20v. the absolute maximum supply voltage for lt1054l is 7v. note 3: the devices are guaranteed by design to be functional up to the absolute maximum junction temperature. note 4: for voltage loss tests, the device is connected as a voltage inverter, with pins 1, 6, and 7 (3, 12, and 13 s package) unconnected. the voltage losses may be higher in other configurations. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (note 7) parameter conditions min typ max units supply current i load = 0ma lt1054: v in = 3.5v v in = 15v l l 2.5 3.0 4.0 5.0 ma ma lt1054l: v in = 3.5v v in = 7v l l 2.5 3.0 4.0 5.0 ma ma supply voltage range lt1054 lt1054l l l 3.5 3.5 15 7 v v voltage loss (v in C |v out |) c in = c out = 100f tantalum (note 4) i out = 10ma i out = 100ma i out = 125ma (lt1054l) l l l 0.35 1.10 1.35 0.55 1.60 1.75 v v v output resistance ?i out = 10ma to 100ma (note 5) l 10 15 oscillator frequency lt1054: 3.5v v in 15v lt1054l: 3.5v v in 7v l l 15 15 25 25 40 35 khz khz reference voltage i ref = 60a, t j = 25c l 2.35 2.25 2.50 2.65 2.75 v v regulated voltage v in = 7v, t j = 25c, r l = 500 (note 6) C4.70 C5.00 C5.20 v line regulation lt1054: 7v v in 12v, r l = 500 (note 6) l 5 25 mv load regulation v in = 7v, 100 500 (note 6) l 10 50 mv maximum switch current 300 ma supply current in shutdown v pin1 = 0v l 100 200 a note 5: output resistance is defined as the slope of the curve, (?v out vs ?i out ), for output currents of 10ma to 100ma. this represents the linear portion of the curve. the incremental slope of the curve will be higher at currents <10ma due to the characteristics of the switch transistors. note 6: all regulation specifications are for a device connected as a positive-to-negative converter/regulator with r1 = 20k, r2 = 102.5k, c1 = 0.002f, (c1 = 0.05f s package) c in = 10f tantalum, c out = 100f tantalum. note 7: the s8 package uses a different die than the h, j8, n8 and s packages. the s8 device will meet all the existing data sheet parameters. see regulation and capacitor selection in the applications information section for differences in application requirements.
lt1054/lt1054l 4 1054lfg typical performance characteristics supply current in shutdown average input current output voltage loss output voltage loss output voltage loss shutdown threshold supply current oscillator frequency temperature (c) ? 50 shutdown threshold (v) 0.4 0.5 0.6 25 75 lt1054 ? tpc01 0.3 0.2 ? 25 0 50 100 125 0.1 0 v pin1 input voltage (v) 0 0 supply current (ma) 1 2 3 4 5 i l = 0 5 10 15 lt1054 ? tpc02 temperature (c) ?50?70 15 frequency (khz) 25 35 0 50 75 lt1054 ? tpc03 ?25 25 100 125 v in = 15v v in = 3.5v input voltage (v) 0 0 quiescent current (a) 20 40 60 80 120 5 10 15 lt1054 ? tpc04 100 v pin1 = 0v output current (ma) 0 0 average input current (ma) 20 60 80 100 140 lt1050 ? tpc05 40 120 40 100 20 60 80 input capacitance (f) 0 0 voltage loss (v) 0.2 0.6 0.8 1.0 1.4 10 50 70 lt1054 ? tpc06 0.4 1.2 40 90 100 20 30 60 80 inverter configuration c out = 100f tantalum f osc = 25khz i out = 100ma i out = 50ma i out = 10ma oscillator frequency (khz) 1 0 voltage loss (v) 1 2 10 100 lt1054 ? tpc07 inverter configuration c in = 10f tantalum c out = 100f tantalum i out = 100ma i out = 50ma i out = 10ma oscillator frequency (khz) 1 0 voltage loss (v) 1 2 10 100 lt1054 ? tpc08 inverter configuration c in = 100f tantalum c out = 100f tantalum i out = 100ma i out = 50ma i out = 10ma
lt1054/lt1054l 5 1954lfg typical performance characteristics regulated output voltage reference voltage temperature coefficient temperature (c) ?50 ?12.6 output voltage (v) ?12.4 ?12.0 ?11.8 ?11.6 ?4.7 ?5.0 0 50 75 lt1054 ? tpc09 ?12.2 ? 4.9 ?4.8 ?5.1 ?25 25 100 125 temperature (c) ?50 ?100 reference voltage change (mv) ?80 ?40 ?20 0 100 40 0 50 75 lt1054 ? tpc10 ?60 60 80 20 ?25 25 100 125 v ref at 0 = 2.500v pin functions fb/shdn (pin 1): feedback/shutdown pin. this pin has two functions. pulling pin 1 below the shutdown threshold ( 0.45v) puts the device into shutdown. in shutdown the reference/regulator is turned off and switching stops. the switches are set such that both c in and c out are discharged through the output load. quiescent current in shutdown drops to approximately 100a (see typical performance characteristics). any open-collector gate can be used to put the lt1054 into shutdown. for normal (unregulated) operation the device will start back up when the external gate is shut off. in lt1054 circuits that use the regulation feature, the external resistor divider can provide enough pull-down to keep the device in shutdown until the output capacitor (c out ) has fully discharged. for most applica- tions where the lt1054 would be run intermittently, this does not present a problem because the discharge time of the output capacitor will be short compared to the off- time of the device. in applications where the device has to start up before the output capacitor (c out ) has fully discharged, a restart pulse must be applied to pin 1 of the lt1054. using the circuit of figure 5, the restart signal can be either a pulse (t p > 100s) or a logic high. diode coupling the restart signal into pin 1 will allow the output voltage to come up and regulate without overshoot. the resistor divider r3/r4 in figure 5 should be chosen to provide a signal level at pin 1 of 0.7v to 1.1v. pin 1 is also the inverting input of the lt1054s error amplifier and as such can be used to obtain a regulated output voltage. cap + /cap C (pin 2/pin 4): pin 2, the positive side of the input capacitor (c in ), is alternately driven between v + and ground. when driven to v + , pin 2 sources current from v + . when driven to ground pin 2 sinks current to ground. pin 4, the negative side of the input capacitor, is driven alternately between ground and v out . when driven to ground, pin 4 sinks current to ground. when driven to v out pin 4 sources current from c out . in all cases current flow in the switches is unidirectional as should be expected using bipolar switches. v out (pin 5): in addition to being the output pin this pin is also tied to the substrate of the device. special care must be taken in lt1054 circuits to avoid pulling this pin positive with respect to any of the other pins. pulling pin?5 positive with respect to pin 3 (gnd) will forward bias the substrate diode which will prevent the device from starting. this condition can occur when the output load driven by the lt1054 is referred to its positive supply (or to some other positive voltage). note that most op amps present just such a load since their supply currents flow from their v + terminals to their v C terminals. to prevent start-up problems with this type of load an external
lt1054/lt1054l 6 1054lfg transistor must be added as shown in figure 1. this will prevent v out (pin 5) from being pulled above the ground pin (pin 3) during start-up. any small, general purpose transistor such as 2n2222 or 2n2219 can be used. r x should be chosen to provide enough base drive to the external transistor so that it is saturated under nominal output voltage and maximum output current conditions. in some cases an n-channel enhancement mode mosfet can be used in place of the transistor. r x v out ( ) i out osc (pin 7): oscillator pin. this pin can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock. internally pin 7 is connected to the oscillator timing capacitor (c t 150pf) which is alternately charged and discharged by current sources of 7a so that the duty cycle is 50%. the lt1054 oscillator is designed to run in the frequency band where switch - ing losses are minimized. however the frequency can be raised, lowered, or synchronized to an external system clock if necessary. the frequency can be lowered by adding an external capacitor (c1, figure 2) from pin 7 to ground. this will increase the charge and discharge times which lowers the oscillator frequency. the frequency can be increased by adding an external capacitor (c2, figure 2, in the range of 5pf to 20pf) from pin 2 to pin 7. this capacitor will couple charge into c t at the switch transitions, which will shorten the charge and discharge time, raising the oscil- lator frequency. synchronization can be accomplished by adding an external resistive pull-up from pin 7 to the reference pin (pin 6). a 20k pull-up is recommended. an open collector gate or an npn transistor can then be used to drive the oscillator pin at the external clock frequency as shown in figure 2. pulling up pin 7 to an external volt - age is not recommended. for circuits that require both frequency synchronization and regulation, an external reference can be used as the reference point for the top of the r1/r2 divider allowing pin 6 to be used as a pull- up point for pin 7. ? + load c in c out lt1054 ? f01 i l v + r x lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out i q i out + + v ref (pin 6): reference output. this pin provides a 2.5v reference point for use in lt1054-based regulator circuits. the temperature coefficient of the reference voltage has been adjusted so that the temperature coefficient of the regulated output voltage is close to zero. this requires the reference output to have a positive temperature coefficient as can be seen in the typical performance curves. this nonzero drift is necessary to offset a drift term inherent in the internal reference divider and comparator network tied to the feedback pin. the overall result of these drift terms is a regulated output which has a slight positive temperature coefficient at output voltages below 5v and a slight negative tc at output voltages above 5v. reference output current should be limited, for regulator feedback networks, to approximately 60a. the reference pin will draw 100a when shorted to ground and will not af - fect the internal reference/regulator, so that this pin can also be used as a pull-up for lt1054 circuits that require synchronization. figure 1 figure 2 v in c out c in c2 c1 lt1054 ? f02 lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out + + v + (pin 8): input supply. the lt1054 alternately charges c in to the input voltage when c in is switched in parallel with the input supply and then transfers charge to c out when c in is switched in parallel with c out . switching oc - curs at the oscillator frequency. during the time that c in pin functions
lt1054/lt1054l 7 1954lfg pin functions is charging, the peak supply current will be approximately equal to 2.2 times the output current. during the time that c in is delivering charge to c out the supply current drops to approximately 0.2 times the output current. an input supply bypass capacitor will supply part of the peak input current drawn by the lt1054 and average out the current drawn from the supply. a minimum input supply bypass capacitor of 2f, preferably tantalum or some other low esr type is recommended. a larger capacitor may be desirable in some cases, for example, when the actual input supply is connected to the lt1054 through long leads, or when the pulse current drawn by the lt1054 might affect other circuitry through supply coupling. applications information theory of operation to understand the theory of operation of the lt1054, a re - view of a basic switched-capacitor building block is helpful. in figure 3 when the switch is in the left position, capaci - tor c1 will charge to voltage v1. the total charge on c1 will be q1 = c1v1. the switch then moves to the right, discharging c1 to voltage v2. after this discharge time the charge on c1 is q2 = c1v2. note that charge has been transferred from the source v1 to the output v2. the amount of charge transferred is: ?q = q1 C q2 = c1(v1 C v2) if the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is: i = (f)( ?q) = (f)[c1(v1 C v2)] to obtain an equivalent resistance for the switched- capacitor network we can rewrite this equation in terms of voltage and impedance equivalence: i = v1C v2 1/ fc1 = v1C v2 r equiv a new variable r equiv is defined such that r equiv = 1/fc1. thus the equivalent circuit for the switched-capacitor network is as shown in figure 4. the lt1054 has the same switching action as the basic switched-capacitor building block. even though this simplification doesnt include finite switch on-resistance and output voltage ripple, it provides an intuitive feel for how the device works. these simplified circuits explain voltage loss as a function of frequency (see typical performance characteristics). as frequency is decreased, the output impedance will eventually be dominated by the 1/fc1 term and voltage losses will rise. note that losses also rise as frequency increases. this is caused by internal switching losses which occur due to some finite charge being lost on each switching cycle. this charge loss per-unit-cycle, when multiplied by the switching frequency, becomes a current loss. at high frequency this loss becomes significant and voltage losses again rise. the oscillator of the lt1054 is designed to run in the frequency band where voltage losses are at a minimum. regulation t he error amplifier of the lt1054 servos the drive to the pnp switch to control the voltage across the input capaci - tor (c in ) which in turn will determine the output voltage. using the reference and error amplifier of the lt1054, an external resistive divider is all that is needed to set the regulated output voltage. figure 5 shows the basic regulator configuration and the formula for calculating the appropriate resistor values. r1 should be chosen to f c1 c2 r l v2 lt1054 ? f03 v1 figure 3. switched-capacitor building block figure 3. switched-capacitor equivalent circuit c2 r l r equiv r equiv = v2 lt1054 ? f04 v1 1 fc1
lt1054/lt1054l 8 1054lfg applications information r4 restart shutdown c1 r2 c in 10f tantalum c out 100f tantalum v out lt1054 ? f05 v in r1 2.2f r3 r2 r1 = + 1 where v ref = 2.5v nominal *choose the closest 1% value for example: to get v out = ?5v referred to the ground pin of the lt1054, choose r1 = 20k, then | v out | ) ) v ref 2 ? 40mv r2 = 20k = 102.6k* + 1 | ?5v | ) ) 2.5v 2 ? 40mv ) ) + 1 | v out | 1.21v lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out + + + be 20k or greater because the reference output current is limited to 100a. r2 should be chosen to be in the range of 100k to 300k. for optimum results the ratio of c in /c out is recommended to be 1/10. c1, required for good load regulation at light load currents, should be 0.002f for all output voltages. a new die layout was required to fit into the physical dimensions of the s8 package. although the new die of the lt1054cs8 will meet all the specifications of the existing lt1054 data sheet, subtle differences in the layout of the new die require consideration in some ap - plication circuits. in regulating mode circuits using the 1054cs8 the nominal values of the capacitors, c in and c out , must be approximately equal for proper operation at elevated junction temperatures. this is different from the earlier part. mismatches within normal production tolerances for the capacitors are acceptable. making the nominal capacitor values equal will ensure proper opera - tion at elevated junction temperatures at the cost of a small degradation in the transient response of regulator circuits. for unregulated circuits the values of c in and c out are normally equal for all packages. for s8 applica - tions assistance in unusual applications circuits, please consult the factory. it can be seen from the circuit block diagram that the maximum regulated output voltage is limited by the supply voltage. for the basic configuration, | v out | referred to the ground pin of the lt1054 must be less than the total of the supply voltage minus the voltage loss due to the switches. the voltage loss versus output current due to the switches can be found in typical performance characteristics. other configurations such as the negative doubler can provide higher output voltages at reduced output currents (see typical applications). capacitor selection for unregulated circuits the nominal values of c in and c out should be equal. for regulated circuits see the section on regulation. while the exact values of c in and c out are noncritical, good quality, low esr capacitors such as solid tantalum are necessary to minimize voltage losses at high currents. for c in the effect of the esr of the capacitor will be multiplied by four due to the fact that switch currents are approximately two times higher than output current and losses will occur on both the charge and discharge cycle. this means that using a capacitor with 1 of esr for c in will have the same effect as increasing the output imped - ance of the lt1054 by 4. this represents a significant increase in the voltage losses. for c out the affect of esr is less dramatic. c out is alternately charged and discharged at a current approximately equal to the output current and the esr of the capacitor will cause a step function to oc - cur in the output ripple at the switch transitions. this step function will degrade the output regulation for changes in output load current and should be avoided. realizing that large value tantalum capacitors can be expensive, a technique that can be used is to parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor to gain both low esr and reasonable cost. where physical size is a concern some of the newer chip type surface mount tantalum capacitors can be used. these capacitors are normally rated at working voltages in the 10v to 20v range and exhibit very low esr (in the range of 0.1). output ripple the peak-to-peak output ripple is determined by the value of the output capacitor and the output current. peak-to- peak output ripple may be approximated by the formula: dv = i out 2fc out figure 5
lt1054/lt1054l 9 1954lfg applications information where dv = peak-to-peak ripple and f = oscillator frequency. for output capacitors with significant esr a second term must be added to account for the voltage step at the switch transitions. this step is approximately equal to: (2i out )(esr of c out ) power dissipation the power dissipation of any lt1054 circuit must be limited such that the junction temperature of the device does not exceed the maximum junction temperature rat - ings. the total power dissipation must be calculated from two components, the power loss due to voltage drops in the switches and the power loss due to drive current losses. the total power dissipated by the lt1054 can be calculated from: p (v in C | v out | )(i out ) + (v in )(i out )(0.2) where both v in and v out are referred to the ground pin (pin?3) of the lt1054. for lt1054 regulator circuits, the power dissipation will be equivalent to that of a linear regulator. due to the limited power handling capability of the lt1054 packages, the user will have to limit output current requirements or take steps to dissipate some power external to the lt1054 for large input/output differentials. this can be accomplished by placing a resistor in series with c in as shown in figure 6. a portion of the input voltage will then be dropped across this resistor without affecting the output regulation. because switch current is approximately 2.2 times the output current and the resistor will cause a voltage drop when c in is both charging and discharging, the resistor should be chosen as: r x = v x /(4.4 i out ) where: v x v in C [(lt1054 voltage loss)(1.3) + | v out | ] and i out = maximum required output current. the factor of 1.3 will allow some operating margin for the lt1054. for example: assume a 12v to C 5v converter at 100ma output current. first calculate the power dissipation without an external resistor: p = (12v C | C 5v | )(100ma) + (12v)(100ma)(0.2) p = 700mw + 240mw = 940mw at ja of 130c/w for a commercial plastic device this would cause a junction temperature rise of 122c so that the device would exceed the maximum junction tempera - ture at an ambient temperature of 25c. now calculate the power dissipation with an external resistor (r x ). first find how much voltage can be dropped across r x . the maxi- mum voltage loss of the lt1054 in the standard regulator configuration at 100ma output current is 1.6v, so: v x = 12v C [(1.6v)(1.3) + | C 5v | ] = 4.9v and r x = 4.9v/(4.4)(100ma) = 11 this resistor will reduce the power dissipated by the lt1054 by (4.9v)(100ma) = 490mw. the total power dis - sipated by the lt1054 would then be (940mw C 490mw) = 450mw. the junction temperature rise would now be only 58c. although commercial devices are guaranteed to be functional up to a junction temperature of 125c, the specifications are only guaranteed up to a junction tem- perature of 100c, so ideally you should limit the junction temperature to 100c. for the above example this would mean limiting the ambient temperature to 42c. other steps can be taken to allow higher ambient temperatures. the thermal resistance numbers for the lt1054 packages represent worst-case numbers with no heat sinking and still air. small clip-on type heat sinks can be used to lower the thermal resistance of the lt1054 package. in some systems there may be some available airflow which will help to lower the thermal resistance. wide pc board traces from the lt1054 leads can also help to remove heat from the device. this is especially true for plastic packages. c1 r2 c in c out v out lt1054 ? f06 v in r1 r x lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out + + figure 6
lt1054/lt1054l 10 1054lfg typical applications basic voltage inverter negative voltage doubler basic voltage inverter/regulator positive doubler 100f v in ?v out lt1054 ? tao2 lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out 2f 100f + + + 0.002f r2 10f 100f refer to figure 5 2f v out lt1054 ? ta03 v in r1 r2 r1 = =+ 1 | v out | ) ) v ref 2 ? 40mv ) ) + 1 , | v out | 1.21v lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out + + + 2f 100f v in = ?3.5v to ?15v v out = 2v in + (lt1054 voltage loss) + (q x saturation voltage) *see figure 3 v in v in v out lt1054 ? tao4 r x * + ? 100f + + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out q x * 1n4001 v in = 3.5v to 15v v out 2v in ? (v l + 2v diode ) v l = lt1054 voltage loss v in 3.5v to 15v lt1054 ? tao5 1n4001 v out 50ma + ? 100f 2f 10f + + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out 100ma regulating negative doubler 1n4002 hp5082-2810 v in 3.5 to 15v 20k 1n4002 0.002f lt1054 ? tao6 2.2f r1 40k v out set pin 2 lt1054 #1 ?v out i out ? 100ma max r2 500k 1n4002 1n4002 1n4002 , refer to figure 5 v in = 3.5 to 15v v out max ?2v in + [1054 voltage loss + 2(v diode )] r2 r1 = =+ 1 | v out | ) ) v ref 2 ? 40mv ) ) + 1 | v out | 1.21v 10f 10f 100f + + + 10f + 10f 10f + + + 10f + lt1054 #1 fb/shdn cap + gnd cap ? v + osc v ref v out lt1054 #2 fb/shdn cap + gnd cap ? v + osc v ref v out
lt1054/lt1054l 11 1954lfg typical applications 5v to 12v converter bipolar supply doubler strain gauge bridge signal conditioner v in 3.5v to 15v ?v out lt1054 ? tao7 +v out + ? + ? = 1n4001 v in = 3.5v to 15v +v out 2v in ? (v l + 2v diode ) ?v out ?2v in + (v l + 2v diode ) v l = lt1054 voltage loss 100f 10f 10f 10f 100f 100f + + + + + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out 20k 1n914 1n914 v in = 5v to pin 4 lt1054 #1 v out ?12v i out = 25ma v out 12v i out = 25ma lt1054 ? tao8 1k 2n2219 10f 100f 10f 10f 100f 5f 100f 5f + + + + + + + + lt1054 #2 fb/shdn cap + gnd cap ? v + osc v ref v out lt1054 #1 fb/shdn cap + gnd cap ? v + osc v ref v out 1f 5v 1 2 3 8 200k 3k 100f tantalum lt1054 ? tao9 0.022f ? + 2n2222 a = 125 for 0v to 3v out from full-scale bridge output of 24mv 100k 100k 10k zero trim 5k gain trim 10k 10k 5v 40 301k 1m a1 1/2 lt1013 5k 6 5 4 7 10k 2n2907 input ttl or cmos low for on 350 ? + a2 1/2 lt1013 10f + + 10f + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out
lt1054/lt1054l 12 1054lfg typical applications 3.5v to 5v regulator regulating 200ma, 12v to C 5v converter digitally programmable negative supply 5f 100f 20k 1n914 r1 20k 1n914 v in = 3.5v to 5.5v v out = 5v i out(max) = 50ma 1n914 1n5817 v in 3.5v to 5.5v lt1054 ? ta10 ltc1044 1 2 3 4 8 7 6 5 1f 1f 0.002f r2 125k 3k 1n914 r2 125k 2n2219 v out = 5v + ? 10f + + + + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out 0.002f hp5082-2810 v out = ?5v i out = 0ma to 200ma 12v r1 39.2k r2 200k 20k 10 1/2w lt1054 ? ta11 10 1/2w 10f 5f 200f 10f + + + + lt1054 #1 fb/shdn cap + gnd cap ? v + osc v ref v out lt1054 #2 fb/shdn cap + gnd cap ? v + osc v ref v out refer to figure 5 r2 r1 = =+ 1 | v out | ) ) v ref 2 ? 40mv ) ) + 1 , | v out | 1.21v 20k v out = ?v in (programmed) 20k 15v lt1004-2.5 2.5v lt1054 ? ta12 ad558 16 11 14 digital input 13 12 10f 5f + 100f + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out
lt1054/lt1054l 13 1954lfg package description j8 package 8-lead cerdip (narrow .300 inch, hermetic) (reference ltc dwg # 05-08-1110) j8 0801 .014 ? .026 (0.360 ? 0.660) .200 (5.080) max .015 ? .060 (0.381 ? 1.524) .125 3.175 min .100 (2.54) bsc .300 bsc (7.62 bsc) .008 ? .018 (0.203 ? 0.457) 0 ? 15 .005 (0.127) min .405 (10.287) max .220 ? .310 (5.588 ? 7.874) 1 2 3 4 8 7 6 5 .025 (0.635) rad typ .045 ? .068 (1.143 ? 1.650) full lead option .023 ? .045 (0.584 ? 1.143) half lead option corner leads option (4 plcs) .045 ? .065 (1.143 ? 1.651) note: lead dimensions apply to solder dip/plate or tin plate leads n8 package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) n8 1002 .065 (1.651) typ .045 ? .065 (1.143 ? 1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min .008 ? .015 (0.203 ? 0.381) .300 ? .325 (7.620 ? 8.255) .325 +.035 ?.015 +0.889 ?0.381 8.255 ( ) 1 2 3 4 8 7 6 5 .255 .015* (6.477 0.381) .400* (10.160) max note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc
lt1054/lt1054l 14 1054lfg package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) so8 0303 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) s16 (wide) 0502 note 3 .398 ? .413 (10.109 ? 10.490) note 4 16 15 14 13 12 11 10 9 1 n 2 3 4 5 6 7 8 n/2 .394 ? .419 (10.007 ? 10.643) .037 ? .045 (0.940 ? 1.143) .004 ? .012 (0.102 ? 0.305) .093 ? .104 (2.362 ? 2.642) .050 (1.270) bsc .014 ? .019 (0.356 ? 0.482) typ 0 ? 8 typ note 3 .009 ? .013 (0.229 ? 0.330) .005 (0.127) rad min .016 ? .050 (0.406 ? 1.270) .291 ? .299 (7.391 ? 7.595) note 4 45 .010 ? .029 (0.254 ? 0.737) inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options 4. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) .420 min .325 .005 recommended solder pad layout .045 .005 n 1 2 3 n/2 .050 bsc .030 .005 typ sw package 16-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620)
lt1054/lt1054l 15 1954lfg information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number f 12/10 the ltc1054mj8 is now available. changes reflected throughout the data sheet 1 to 16 g 6/11 correct error to part number from ltc7660 to icl7660 1 (revision history begins at rev f)
lt1054/lt1054l 16 1054lfg linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0611 rev g ? printed in usa related parts typical applications negative doubler with regulator positive doubler with regulation 0.03f v in = 5v 50k 1n5817 1n5817 lt1054 ? ta13 ? + 10k 10k 10k 5.5k 2.5k 0.1f 5v lt1006 100f v out 8v 50ma 2f 10f + + + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out 2f v in 3.5v to 15v 100f r2 1m 1n4001 1n4001 lt1054 ? ta14 100f 0.002f ?v out v in = 3.5v to 15v v out(max) ?2v in + (v l + 2v diode ) v l = lt1054 voltage loss , refer to figure 5 r2 r1 = =+ 1 | v out | ) ) v ref 2 ? 40mv ) ) + 1 | v out | 1.21v 10f + + + + 10f + lt1054 fb/shdn cap + gnd cap ? v + osc v ref v out r1, 20k part number description comments lt c ? 1144 switched-capacitor wide input range voltage converter with shutdown wide input voltage range: 2v to 18v, i sd < 8a, so8 ltc1514/ltc1515 step-up/step-down switched-capacitor dc/dc converters v in : 2v to 10v, v out : 3.3v to 5v, i q = 60a, so8 lt1611 150ma output, 1.4mhz micropower inverting switching regulator v in : 0.9v to 10v, v out : 34v thinsot? lt1614 250ma output, 600khz micropower inverting switching regulator v in : 0.9v to 6v, v out : 30v, i q = 1ma, ms8, so8 ltc1911 250ma, 1.5mhz inductorless step-down dc/dc converter v in : 2.7v to 5.5v, v out : 1.5v/1.8v, i q = 180a, ms8 ltc3250/ltc3250-1.2/ ltc3250-1.5 inductorless step-down dc/dc converter v in : 3.1v to 5.5v, v out : 1.2v, 1.5v, i q = 35a, thinsot ltc3251 500ma spread spectrum inductorless step-down dc/dc converter v in : 2.7v to 5.5v, v out : 0.9v to 1.6v, 1.2v, 1.5v, i q = 9a, ms10e ltc3252 dual 250ma, spread spectrum inductorless step-down dc/dc converter v in : 2.7v to 5.5v, v out : 0.9v to 1.6v, i q = 50a, dfn12 the typical applications circuits were verified using the standard lt1054. for s8 applications assistance in any of the unusual applications circuits please consult the factory

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